<
hardware, memory management> (MMU, "Paged
Memory Management
Unit", PMMU) A
hardware device or circuit that supports
virtual memory and
paging by translating {virtual
addresses} into
physical addresses.
The virtual
address space (the range of addresses used by
the processor) is divided into
pages, whose size is 2^N,
usually a few
kilobytes. The bottom N
bits of the address
(the offset within a page) are left unchanged. The upper
address bits are the (virtual)
page number. The MMU
contains a
page table which is indexed (possibly
associatively) by the page number. Each page table entry
(PTE) gives the physical page number corresponding to the
virtual one. This is combined with the page offset to give
the complete physical address.
A PTE may also include information about whether the page has
been written to, when
it was last used (for a {least recently
used}
replacement algorithm), what kind of processes ({user
mode},
supervisor mode) may read and write
it, and whether
it should be
cached.
It is possible that no physical
memory (
RAM) has been
allocated to a given virtual page, in which case the MMU will
signal a "
page fault" to the
CPU. The
operating system
will then try to find a spare page of RAM and set up a new PTE
to map
it to the requested virtual address. If no RAM is free
it may be necessary to choose an existing page, using some
replacement algorithm, and save
it to disk (this is known as
"
paging"). There may also be a shortage of PTEs, in which
case the OS will have to free one for the new mapping.
In a
multitasking system all processes compete for the use
of
memory and of the MMU. Some
memory management
architectures allow each process to have its own area or
configuration of the page table, with a mechanism to switch
between different mappings on a process switch. This means
that all processes can have the same virtual address space
rather than require load-time relocation.
An MMU also solves the problem of
fragmentation of
memory.
After blocks of
memory have been allocated and freed, the free
memory may become fragmented (discontinuous) so that the
largest contiguous block of free
memory may be much smaller
than the total amount. With
virtual memory, a contiguous
range of virtual addresses can be mapped to several
non-contiguous blocks of physical
memory.
In early designs
memory management was performed by a separate
integrated circuit such as the
MC 68851 used with the
Motorola 68020 CPU in the
Macintosh II or the
Z8015
used with the
Zilog Z80 family of processors. Later CPUs
such as the
Motorola 68030 and the
ZILOG Z280 have MMUs on
the same IC as the CPU.
(1999-05-24)